Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-03-09
2002-10-15
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S464000, C438S737000, C438S454000, C438S460000
Reexamination Certificate
active
06465344
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to thinning and dicing of wafers. In particular, the present invention relates to a method of thinning and dicing wafers that reduces edge defects.
2. Description of the Background
Solid materials having semiconductor or opto-electronic properties are used in applications ranging from the well-known integrated circuits of computer technology to sensors and optical devices used in advanced communications. For these applications, the materials must often be cut, thinned, and polished to a precise size, to meet the dimensional tolerances and surface characteristics required by the application.
Bulk materials are usually first cut into sheets or wafers for subsequent processing, dicing, and thinning procedures. To create smaller pieces or sections of the material, the sheet or wafer is diced. Dicing is a term from the semiconductor industry and refers to cutting a semiconductor wafer into squares or rectangles known as “die”. In semiconductor applications, circuitry has usually been fabricated into each die before it is cut. A semiconductor-dicing saw is used to saw the sheet or wafer into individual die.
Thinning is traditionally performed by mounting or bonding the material onto a substrate device and then using lapping, polishing, or diamond point turning systems to reduce the thickness of the material. In the manufacture of semiconductors, thinning is performed on a wafer or large piece of crystal material in which semiconductor processing may or may not have been performed. In other applications, the material may be thinned after the wafer or sheet is cut into die.
A problem with dicing and thinning is that these processes can damage the material.
FIG. 1A
illustrates a saw blade
100
cutting through a wafer
105
and producing a cut
110
in the material. As the saw blade
100
moves through wafer
105
it removes crystal material producing the cut. As illustrated in
FIG. 1B
, the saw also produces edge damage
120
, in which chips, jagged edges, microcracks, fractures and other defects occur in the wafer material as the saw removes the material. Edge damage
120
occurs along sidewalls
125
of the cut
110
and surfaces
123
of wafer
105
near cut
110
. Edge damage
120
also extends into the wafer
105
in the form of microcracks and fractures.
The die resulting from the dicing process may then be thinned. However, edge damage
120
is not removed by the thinning process.
FIG. 2A
illustrates an assembly
200
used for thinning die
210
. Die
210
is cut from wafer
105
and mounted to a substrate
215
, which may be an inactive mechanical support or an active electronic component, depending on the application of die
210
. An adhesion material
218
such as epoxy or wax can be used to mount the die
210
to substrate
215
. The location of the edge damage
120
on die
210
created by the dicing process is illustrated in the sectional view of
FIG. 2B
, taken along line I—I of FIG.
2
A. Die
210
has an initial thickness T
i
, illustrated in the expanded view of FIG.
2
C.
The mounted die
210
is thinned from top surface
230
.
FIGS. 2D and 2E
illustrate die
210
thinned to a final thickness T
f
, which is less than the initial thickness T
i
. The edge damage
120
remains in die
210
after thinning, and is thus present in the final application of die.
Edge damage
120
reduces the strength of the material of die
210
, leaving it susceptible to cracking, which reduces the yield and performance of the device to be fabricated from the die. For example, when an integrated circuit chip is handled and packaged the silicon crystal is subjected to mechanical and temperature-induced stresses.
These stresses can cause the cracks in the damaged edge region to propagate into the active chip areas, damaging the chip circuitry and reducing the reliability of the integrated circuit.
Another application in which damage to the edge and surface of a die reduces yields and device performance is in infrared detection sensors, known as infrared focal plane arrays. In these sensors, two crystals, a detector die and a readout circuit chip, are bonded together to form the sensor. The detector die is typically composed of a material such as Si, Ge, InSb, HgCdTe, and InGaAs having an array of photodiodes formed therein. The readout circuit chip is typically a conventional silicon integrated circuit having the necessary circuitry for picking up the signals detected by the detector array, and amplifying and processing those signals for the specific monitoring application.
These sensors are particularly susceptible to cracking because they are operated at low temperature and the two crystals that form the sensor, the detector die and the readout circuit chip, have different thermal expansion coefficients. Therefore, when the sensor is cooled, the size of one of the crystals changes more than the other, introducing strain into the device and causing it to crack and fail. Most often it is the thinner and weaker detector crystal that cracks.
This problem has been addressed by designing sensors to minimize the strain between the two crystals as they cool, as described in U.S. Pat. No. 5,264,699 to Barton et al. and U.S. Pat. No. 5,308,980 to Barton. However, these methods do not directly address the defects that reduce the strength of the detector material. As with the integrated circuit chips described above, microcracks and other damage at the edges and surface can propagate into the crystal as it is strained when the device is cooled.
SUMMARY
In accordance with the embodiments of this invention, methods for forming die are provided which produce die that have minimal edge and surface damage. A trench is formed in a first surface of a wafer from which the die will be produced. The trench surrounds the die such that at least one sidewall of the trench forms the peripheral edge of the die. The depth of the sidewalls of the trench is at least as large as the thickness of the edge of the die after thinning. The trench is made by a method that causes minimal damage to the die.
Methods that can be used to form the trench with only minimal damage to the die include, for example, partial sawing, wet chemical etching, reactive ion etching, and ion milling. A combination of these methods can be used to create die having the desired sidewall straightness and edge damage. For example, partial sawing can form trenches with straight sidewalls and can be followed with a wet chemical etch to remove any damage created by the partial sawing. A protective coating is used to protect the first surface of the die and any circuitry or other structure that may be formed thereon.
The wafer is cut into sections that contain the die. A through-cut is produced that extends from the bottom surface of the trench to a second surface of the wafer that is opposite the first surface of the wafer to form the section. The through-cut is displaced from the sidewall of the trench by a length so that a shelf is created on the section between the sidewall, which forms a peripheral edge of the die, and the through-cut.
The section is mounted onto a holder, which may be a substrate with an adhesion material between the substrate and the section. The section is mounted so that the first surface faces into the holder. The section is thinned from the second surface until the desired thickness is reached.
The substrate may be an integrated circuit readout chip, the adhesion material an epoxy, and the die an infrared sensitive crystal, thus forming an infrared sensor device.
REFERENCES:
patent: 4395451 (1983-07-01), Althouse
patent: 5286656 (1994-02-01), Keown et al.
patent: 5340772 (1994-08-01), Rosotker
patent: 5881888 (1999-03-01), Ohkawara et al.
patent: 5883008 (1999-03-01), McClure
Elms Richard
Indigo Systems Corporation
Luu Pho M.
MacPherson Kwok & Chen & Heid LLP
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