Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2005-12-30
2011-12-06
Bullock, Jr., Lewis (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S603000, C708S627000
Reexamination Certificate
active
08073892
ABSTRACT:
In general, in one aspect, the disclosure describes a multiplier that includes a set of multiple multipliers configured in parallel where the set of multiple multipliers have access to a first operand and a second operand to multiply, the first operand having multiple segments and the second operand having multiple segments. The multiplier also includes logic to repeatedly supply a single segment of the second operand to each multiplier of the set of multiple multipliers and to supply multiple respective segments of the first operand to the respective ones of the set of multiple multipliers until each segment of the second operand has been supplied with each segment of the first operand. The logic shifts the output of different ones of the set of multiple multipliers based, at least in part, on the position of the respective segments within the first operand. The multiplier also includes an accumulator coupled to the logic.
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Cutter Daniel R.
Feghali Wajdi K.
Gaubatz Gunnar
Gopal Vinodh
Hasenplaugh William C.
Bullock, Jr. Lewis
Grossman Tucker Perreault & Pfleger PLLC
Hughes Kevin G
Intel Corporation
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