Cryptographic architecture with random instruction masking...

Details Cryptographic architecture with random instruction masking... Cryptographic architecture with random instruction masking...

2004-06-08

2011-11-22

Dada, Beemnet (Department: 2435)

Electrical computers and digital processing systems: support

Data processing protection using cryptography

Computer instruction/address encryption

C713S194000, C726S022000

Reexamination Certificate

active

08065532

ABSTRACT:
An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.

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