Crosstalk noise reduction circuit and method

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C327S309000, C327S379000, C327S382000, C327S389000, C326S026000, C326S030000

Reexamination Certificate

active

07739643

ABSTRACT:
In a semiconductor device, a method for reducing the effect of crosstalk from an aggressor line to a victim line begins with sensing the occurrence of a voltage change on the aggressor line that can induce a voltage pulse having a pulse magnitude that exceeds a pulse threshold on the victim line. The induced voltage pulse is counteracted by coupling the victim line to a counteracting voltage source. After a predetermined delay period, the coupling of the counteracting voltage source is removed from the victim line. The voltage change on the aggressor line my be sensed from a node connected to either the aggressor line or the victim line. A rising induced pulse is counteracted by coupling the victim line to a more negative voltage source, and a falling induced pulse is counteracted by coupling the victim line to a more positive voltage source.

REFERENCES:
patent: 5900766 (1999-05-01), Naffziger et al.
patent: 6201431 (2001-03-01), Allen et al.
patent: 6414542 (2002-07-01), Lin et al.
patent: 6448807 (2002-09-01), Ahsanullah
patent: 6925624 (2005-08-01), Komoda
patent: 7116126 (2006-10-01), Tomsio et al.
patent: 2007/0013429 (2007-01-01), Katoch et al.

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