Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-02-12
2001-02-13
Wiley, David A (Department: 2781)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
Reexamination Certificate
active
06189058
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
This invention relates generally to PCI hot plug technology.
2. Description of Related Art
PCI Hot Plug technology allows a server to be upgraded and serviced without powering down the entire system. A hot-pluggable PCI (peripheral component interconnect) interface card, which can be removed and inserted without turning off the server, is valuable because it can increase the availability of the server. This is becoming a very important attribute of PC servers since the higher reliability factor the searchers, the less potential a server has of being shut down and going off line. As can be appreciated servers that go off line can have an extremely adverse impact on a company-wide network.
Previous practice was to maintain the modular components or printed circuit boards of a server by turning the power to the server off before any modular components or printed circuit boards were removed from or added to the chassis or support frame of the server. Recent innovations have centered around a highly desirable design goal of “hot-plugability” which addresses the benefits derived from being able to insert and remove modular components and printed cards from a server when the server is electrically connected and operational. It can be readily appreciated that modularization and hot-plugability can have a significant bearing on the high availability aspect of a high-end server.
Hot-pluggable components may include storage or disc drives, drive cages, fans, power supplies, system I/O boards, control boards, processor boards, and other sub-assemblies. The ability to remove these constituent components without having to power down the server allows for better overall serviceability of the system, which is a distinct advantage to both the user and the maintenance technician. In particular, when Hot-Plug PCI cards are commercialized, interface cards and storage devices, two of the most critical plug-in devices in a PC server will be capable of removal and insertion without shutting down the server.
Existing systems implemented 64 bit PCI operations using a 32 bit Controller. The hot plug operation was implemented using a quick switch located on the PCI bus with the ability to disconnect a PCI slot from the PCI bus as directed by the PCI Controller typically with a bus enable signal. The control of the Req
—
64 line was implemented using discrete logic. In existing art, the hot plug power-up operation, known as connect-busfirst, proceeded with the Controller initiating the following events in the following sequence: power_enable, bus_enable, reset deassertion. In this sequence, a power_enable signal turns on the power of the PCI slot, the bus_enable signal closes the quick switch attaching the PCI slot to the PCI bus, and finally a reset signal is deasserted communicating to the PCI card located in the PCI slot to initiate operation.
Systems are being developed utilizing an actual 64 bit Controller which includes control of the Req
—
64 line. For 64 bit systems, the PCI card samples a control line called Req
—
64 a small delay time after receiving the reset signal. This line tells the card that it may operate in a 64 bit mode.
In implementing a server based on 66 megahertz PCI, the above procedure for powering up a PCI card are inadequate, although the procedure was sufficient for slower systems of the prior art. In implementing 66 megahertz PCI, there is a concern that future cards which plug into the PCI bus will need more time after the deassertion of reset to lock their internal phase lock loops, and possibly load the arrays for field programmable gate arrays. Thus, a future card operating on a 66 megahertz PCI may fail during the hot plug operation.
SUMMARY OF THE INVENTION
The present invention solves the above problem of preventing failure of hot plugability for a 66 Megahertz, 64 bit PCI bus. In order to solve this problem, the present invention initiates a connect_bus_last operation. The connect_bus_last operation proceeded with the Controller initiating the following events in sequence: power_enable, reset deassertion, bus_enable. In this sequence, the bus is connected last allowing the card time to get organized and configured after the reset deassertion before connecting the bus. The procedure of connecting the bus last creates a problem of its own in that although the card initiates sampling for the Req
—
64 signal after the reset, the card will not see this control signal due to the fact that the bus is still disconnected until the bus_enable signal is asserted. The present invention provides a simple solution to this problem by using a crossbar switch having one input tied to ground and the other tied to the Controller. The Req
—
64 signal bypasses the quick switch configuration and goes through the cross bar switch. The Req
—
64 signal is tied to ground during the time that the card samples for the 64 mode. Since the Req
—
64 signal is an active low signal, the card correctly identifies the system as 64 bit as indicated by the active low. Upon assertion of the bus_enable signal, the Req
—
64 control line is then attached to the expansion slot along with the other signal lines of the PCI bus.
In an embodiment of the present invention, an expansion slot containing a card has a plurality of contacts for receiving a plurality of signal lines from a bus, preferably a 64 bit, 66 Megahertz (MHz) PCI bus. The expansion slot also receives at one of the contacts a mode control line, preferably the Req
—
64 signal of a PCI bus. There are a plurality of switches corresponding to the plurality of signal lines, with one switch for each signal line. Each switch forms a switching action to either connect or disconnect a respective one of the plurality of signal lines of the bus from each of the respective contacts of the expansion slot. A bypass switch, connects (closed state) or disconnects (open state) the mode control line indicating one of a 32 bit bus mode and a 64 bit bus mode from one of the contacts of the expansion slot. The bypass switch in its open state is set to an active low wherein the 64 bus mode is thereby communicated to the card as an active low even when the signal lines of the bus are disconnected from the contacts of the expansion slot.
REFERENCES:
patent: 5555510 (1996-09-01), Verseput et al.
patent: 5784576 (1998-07-01), Guthrie et al.
patent: 5948090 (1999-09-01), Heinrich et al.
PCI Bus Hot Plug Spec, Revision 1.0, Jun. 15, 1997.
PCI Local Bus Spec, Revision 2.1, Jun. 1, 1995.
Jones, III Morrel O.
Rajagopalan Usha
Compaq Computer Corporation
Wiley David A
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