Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2008-02-01
2010-02-02
Auve, Glenn A (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
C718S100000
Reexamination Certificate
active
07657683
ABSTRACT:
An interrupt controller for a dual thread processor has for a first thread, an interrupt request register accessible to the second thread, an interrupt count accessible to the second thread, and an interrupt acknowledge accessible to the first thread. Additionally, the interrupt controller has, for a second thread, an interrupt request register accessible to the first thread, an interrupt count accessible to the first thread, and an interrupt acknowledge accessible to the second thread. Each interrupt controller separately has a counter for each request which increments upon assertion of a request and decrements upon assertion of an acknowledgement.
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Sridhar Kovuri
Venkatesh Narasimhan
Auve Glenn A
Chesavage Jay A.
File-EE-Patents.com
Redpine Signals, Inc.
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