Cross-thread interrupt controller for a multi-thread processor

Electrical computers and digital data processing systems: input/ – Interrupt processing

Reexamination Certificate

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C718S100000

Reexamination Certificate

active

07657683

ABSTRACT:
An interrupt controller for a dual thread processor has for a first thread, an interrupt request register accessible to the second thread, an interrupt count accessible to the second thread, and an interrupt acknowledge accessible to the first thread. Additionally, the interrupt controller has, for a second thread, an interrupt request register accessible to the first thread, an interrupt count accessible to the first thread, and an interrupt acknowledge accessible to the second thread. Each interrupt controller separately has a counter for each request which increments upon assertion of a request and decrements upon assertion of an acknowledgement.

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patent: 2007/0130569 (2007-06-01), Heffley et al.

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