Fishing – trapping – and vermin destroying
Patent
1991-06-27
1993-08-24
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 48, H01L 21265, H01L 21465
Patent
active
052388557
ABSTRACT:
A contact-free floating-gate non-volatile memory cell array and process with silicided NSAG bitlines and with source/drain regions buried beneath relatively thick silicon oxide. The bitlines have a relatively small resistance, eliminating the need for parallel metallic conductors with numerous bitline contacts. The array has relatively small bitline capacitance and may be constructed having relatively small dimensions. Bitline isolation is by P/N junction or by oxide-filled trench, permitting relatively small spacing between transistors. Wordlines may be formed from silicided polycrystalline or other material with low resistivity. Coupling of programming and erasing voltages to the floating gate is improved by using an insulator with relatively high dielectric constant between the control gate and the floating gate. The resulting structure is a dense cross-point array of programmable memory cells.
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Chaudhuri Olik
Donaldson Richard L.
Heiting Leo N.
Lindgren Theodore D.
Texas Instruments Incorporated
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