Creating layout for integrated circuit structures

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

716 11, 716 18, G06F 1750

Patent

active

060773081

ABSTRACT:
A method and system for constructing polygon layout. From a schematic, there is a data file describing a series-parallel transistor structure having a plurality of gate regions and a plurality of source/drain regions. A representation list is created (either by a computer user or by a computer analyzing a netlist). This representation list includes a plurality of region data for the plurality of gate regions and the plurality of source/drain regions. Polygon layout is built for the series-parallel transistor structure from this representation list.

REFERENCES:
patent: 4319396 (1982-03-01), Law et al.
patent: 5416722 (1995-05-01), Edwards
patent: 5633807 (1997-05-01), Fishburn et al.
patent: 5764533 (1998-06-01), DeDood
patent: 5790414 (1998-08-01), Okano et al.
Jankovic et al. "Transforming IC Layout Description from the Unrestricted to a Restricted Format," IEEE, Proc. 21st International Conference on Microelectronics, p733-735, Sep. 1996.
Mathias et al. "FLAG: A Flexible Layout Generator for Analog MOS Transistors," IEEE Journal of Solid-State Circuits, vol. 33, No. 6, p. 896-903, Jun. 1998.
Conn et al. "Optimization of Custom MOS Circuits by Transistor Sizing," 1996 IEEE/ACM Conference on Computer-Aided Design, Nov. 10-14, 1996, p.174-180, Nov. 1996.
Gupta et al. "XPRESS: A Cell Layout Generator with Integrated Transistor Folding," 1998 IEEE/ACM Conference on Computer-Aided Design, Nov. 8-12, 1998, p.128-135.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Creating layout for integrated circuit structures does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Creating layout for integrated circuit structures, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Creating layout for integrated circuit structures will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1848364

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.