CRC verification apparatus with constant delay and method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S757000, C714S807000

Reexamination Certificate

active

10723551

ABSTRACT:
An apparatus and method for detecting errors in received data and transferring only error-free data in data communications are provided. In the cyclic redundancy check (CRC) verification apparatus and method having a constant delay, irrespective of the length of a received data frame, input and output processing delay of received data is made to be constant. The CRC verification apparatus having constant delay comprises an input control unit which stores the start address of an input data frame in a memory storing the input data frame, and stores a CRC verification result in the start address location; and an output control unit which after a predetermined constant time passes from the start address, reads an input data frame and if the CRC verification result is normal, output the read data frame. The apparatus and method make the time taken for receiving a data frame, constant irrespective of the received data frame, while CRC verification is performed.

REFERENCES:
patent: 5629949 (1997-05-01), Zook
patent: 5802080 (1998-09-01), Westby
patent: 5802483 (1998-09-01), Morris
patent: 6247150 (2001-06-01), Niemela
patent: 6393489 (2002-05-01), Sambamurthy et al.
patent: H04L12/56 (1999-07-01), None

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