Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-08-23
2005-08-23
Torres, Joseph D. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S774000, C714S758000
Reexamination Certificate
active
06934902
ABSTRACT:
A CRC encoding circuit for generating CRC bits in accordance with initial parallel data having remainder portion data in a last column of the initial parallel data. A first parallel encoding unit is included for generating first CRC bits in accordance with the initial parallel data other than the remainder portion data. A CRC bits selector selects second CRC bits having predetermined number of bytes, from the first CRC bits generated by the first parallel encoding unit. A parallel data selector selects second parallel data having the same number of bytes as the second CRC bits, from the remainder portion data. A second parallel encoding unit generates third CRC bits in accordance with the second CRC bits and the second parallel data
REFERENCES:
patent: 3678469 (1972-07-01), Freeman et al.
patent: 6701478 (2004-03-01), Yang et al.
Hara Kiyomi
Inoue Takao
Torres Joseph D.
Yokogawa Electric Corporation
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