CPU unit and run alternative control method of programmable...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Reexamination Certificate

active

06760863

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a CPU unit and a run alternative control method of a programmable controller for replacing the CPU unit in which an abnormality occurs while continuing administration of a system and recovering the system in multi-CPU control in which programmable controller CPU units (hereinafter called “CPU unit”) used in industrial equipment etc. form respectively independent systems and perform distributed processing.
BACKGROUND ART
FIG. 10
is a schematic configuration diagram showing a schematic configuration in conventional multi-CPU control, and each CPU unit controls I/O units which are respectively independent and are controlled objects and these CPU units are connected in plurality through a bus and multi-CPU control runs for performing distributed control of a series of all the systems are made.
Incidentally, in the description, a state of the case that an abnormality occurs in one of the CPU units at the time of the multi-CPU control runs will be described.
In the drawing, numeral
11
is a CPU unit for controlling controlled object equipment such as industrial equipment based on stored sequence programs, and numeral
12
is an I/O unit which connects the controlled object equipment and is controlled by the CPU unit
1
, and numeral
13
is a bus.
Here, a system A is constructed of a CPU unit
11
A and an I/O unit
12
A, and a system B is constructed of a CPU unit
11
B and an I/O unit
12
B. Then, the system A and the system B are connected through the bus
3
and a multi-CPU control system is formed.
The CPU unit
11
comprises a microprocessor (MPU)
14
for transferring and analyzing data according to information on an OS program, an OS storage area
15
in which the OS program for controlling this microprocessor
14
is stored, a memory area
16
in which sequence programs etc. for performing sequence control created by a user are stored, and two-port memory
17
for communication between CPU units for conducting communications between the CPU units through the bus
13
in multi-CPU control.
Then, the memory area
16
is divided into a program area
161
for storing a sequence program which a user creates, a device memory area
162
for storing a device state for handling a state or a numeric value of an input/output signal in this sequence program, and a parameter area
163
for storing parameters for defining functions of the CPU unit
1
.
Incidentally, in any of the system A and the system B independent each other, a controlled object and operations for performing control are different, but the inside of the CPU unit
11
is constructed by the substantially same functions.
Next, processing of the case that an abnormality occurs due to an occurrence of failures etc. of a power source in the CPU unit
11
A which is one of the CPU units at the time of the multi-CPU control runs will be described.
Conventionally, at the time of multi-CPU control in a system configuration of
FIG. 10
, each the CPU unit respectively operates by the individual sequence program and the parameter, etc., so that when an abnormality occurs in the CPU unit
11
A, sequence control which has been performed by the CPU unit
11
A in which the abnormality occurs cannot be performed by alternative execution of the other CPU unit
11
B and control to the I/O unit
12
A based on the CPU unit
11
A stops and all the systems cannot be continued in a manner similar to that before the abnormality occurs.
As a result of that, when the abnormality occurs due to failures etc. in the CPU unit
11
A, the system A constructed of the CPU unit
11
A stops.
Thus, a user replaces the CPU unit
11
A in which the abnormality has occurred with another normal CPU unit, and writes the sequence program written into the CPU unit
11
A in which the abnormality has occurred into the replaced CPU unit, and operates the replaced CPU unit to resume the system.
In the control based on the programmable controller of today, in view of performing a larger number of control, a plurality of the CPU units are provided and the control based on the multi-CPU described above is performed.
Conventionally, when a CPU unit in which an abnormality occurs is present during distributed processing in multi-CPU units, until a user replaces the CPU unit
11
A in which the abnormality has occurred with another normal CPU unit and writes the sequence program written into the CPU unit
11
A in which the abnormality has occurred into the replaced CPU unit and operates the replaced CPU unit, a system A in which the CPU unit
11
A performs the distributed processing remains stopped and even if the system A recovers, there was a problem in that all the systems cannot be continued in a manner similar to that before the abnormality occurs.
Also, when the CPU unit in which the abnormality has occurred is replaced with another CPU unit in the case of recovering this system, the sequence program of the CPU unit in which the abnormality has occurred must be stored previously, so that it took time and effort for the user to recover the whole systems in a manner similar to that before the abnormality occurs.
Also, as associated alternative control methods at the object equipment based on a sequence program and predetermined data stored, and a memory area for introducing and storing a second sequence program at the time of an initial processing on system activation, and second predetermined data at the time of END processing after completion of a sequence processing, which a run alternative control object unit preset uses while storing the sequence program and the predetermined data, and when the microprocessor detects an abnormality of the run alternative control object unit, the run alternative control object unit is controlled based on the second sequence program and the second predetermined data stored in the memory area after the completion of predetermined sequence processing in the self unit.
Also, when the second sequence program and the second predetermined data are stored in the memory area, they are acquired from the run alternative control object unit connected through an internal bus via shared memory.
Also, an area for storing the second sequence program and the second predetermined data is provided in the shared memory and the data written from the run alternative control object unit is acquired in the memory area with reference to a predetermined decision flag.
Also, it is determined whether there is an abnormality object equipment based on a sequence program and predetermined data stored, and a memory area for storing a second sequence program and second predetermined data which a run alternative control object unit preset uses while storing the sequence program and the predetermined data, and when the microprocessor detects an abnormality of the run alternative control object unit, the run alternative control object unit is controlled based on the second sequence program and the second predetermined data stored in the memory area after the completion of predetermined sequence processing in the self unit.
Also, when the second sequence program and the second predetermined data are stored in the memory area, they are acquired from the run alternative control object unit connected through an internal bus via shared memory.
Also, the acquisition of the second sequence program is performed at the time of initial processing on system activation and the acquisition of the second predetermined data is performed at the time of END processing after the completion of sequence processing.
Also, an area for storing the second sequence program and the second predetermined data is provided in the shared memory and the data written from the run alternative control object unit is acquired in the memory area with reference to a predetermined decision flag.
Also, it is determined whether there is an abnormality of the run alternative control object unit or not based on the presence or absence of writing of the second predetermined data written from the run alternative control object unit through the shared memory.
Furth

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