Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent
1997-05-13
1999-08-17
Santamauro, Jon
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
326 86, H03K 190175
Patent
active
059398965
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a terminating circuit and then particularly, but not exclusively, to a terminating-circuit related coupling arrangement for achieving impedence matching which is controlled and chosen according to the application in question.
Systems for transmitting information-carrying signals over a signal transmission medium, such as physical conductors or lines, for instance, often require transmitter-related and/or receiver-related impedence matching, which impedence matching will preferably have at least one resistance-dominated impedence value adapted to the impedance of the signal Although the main application of the invention is found in a transmitter-related and/or a receiver-related impedance-matching terminating-circuit related coupling arrangement, it is thought that the most frequent application will be one in which the coupling arrangement is coupled upstream of a signal-receiving and signal-processing unit.
Consequently, the following description is simplified to include only this latter application of the invention, and the person skilled in this art will be well aware of the conditions and prerequisites required to implement the inventive coupling arrangement in a signal-transmitting unit, particularly on the basis of the teachings provided in the following description.
Thus, the present invention pertains to a terminating-circuit related coupling arrangement which, related to the signal transmission medium, may be coupled upstream of a signal-receiver and signal-processing unit, said unit being connected to a single transmission medium conductor and to a reference potential in the case of "single-ended" signalling, and to two transmission medium conductors in the case of "differential" signalling.
As the person skilled in this art will be aware, the difference between single-ended signalling and differential signalling is that in the former case an information-carrying signal occurs as voltage pulses on one conductor and in the latter case as voltage pulses between two conductors which are counter-directed so that when a high voltage pulse occurs on one conductor a low voltage pulse will occur on the other conductor, and vice versa.
The invention has been devised for inclusion in a signal-transmission system, and then particularly in a system for transmitting a digital information-related signal structure. In such systems, it is desired to be able to balance-out a transmitter impedance and/or a receiver impedance which exhibits pronounced resistive properties against the impedance value of the signal-transmitting medium, so as to improve signal transmission quality and to reduce otherwise occurring signal reflections at the ends of the transmission medium.
The terminating-circuit related coupling arrangement adapted for a signal-receiving and signal-processing unit in accordance with the invention is particularly suitable for application in a differential signalling system, in which oppositely directed voltage values on the conductors alternate between two chosen signal voltage levels, a low voltage level and a high voltage level.
The inventive coupling arrangement is also adapted to enable it to be incorporated in an integrated circuit and it shall be possible to form the chosen circuit solution via a selected conductor pattern for using metal layers, applied to a selected base matrix (base bar) so as to form a circuit macro, such as an I/O macro (input and output circuits for the integrated circuit).
It is considered particularly beneficial to construct the inventive coupling arrangement so that it can be implemented by using a standardized basic chip having a centrally orientated gate ocean with the input and outputs that belong to the coupling devices including PMOS transistors and NMOS transistors, among other things.
When such a basic chip is provided with a chosen number of metal layers, via which layers the requisite coupling arrangement is formed, there is constructed a gate matrix having functionally complete I/O circuits or like edge-orientate
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Le Don Phv
Santamauro Jon
Telefonaktiebolaget LM Ericsson
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