Coupler circuit and its use in a card and process

Details Coupler circuit and its use in a card and process Coupler circuit and its use in a card and process

1996-11-12

1998-10-27

Robertson, David L.

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

711112, 711151, 395732, 395860, G06F 1200

Patent

active

058290435

ABSTRACT:
An integrated coupler circuit for relieving a microprocessor of directing individual data exchanges between a cache memory, composed of a dynamic read/write memory, and a disk controller and an MCA bus. The integrated coupler circuit provides a means for directing data exchanges between the disk controller and the dynamic cache memory with the highest level of priority after initialization by the microprocessor, refreshing the dynamic cache memory with the second highest level of priority, directing data exchanges between the microprocessor and the dynamic cache memory with the third highest level of priority, and directing data exchanges between the dynamic cache memory and a stack incorporated into the coupler circuit with the lowest level of priority after initialization by the microprocessor.

REFERENCES:
patent: 5075805 (1991-12-01), Peddle et al.
patent: 5133060 (1992-07-01), Weber et al.
patent: 5239636 (1993-08-01), Dujari et al.
PC Backup Manual of PC Tools Deluxe, Ver. 6, 1990 pp. 153-154.

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