Counter updating system using an update mechanism and...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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Details

C710S055000, C707S793000, C711S159000, C711S165000, C711S005000, C709S234000

Reexamination Certificate

active

07401169

ABSTRACT:
Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, and mechanisms for maintaining counters, such as in, but not limited to a packet switching system, and updating a secondary counter storage based on values of the counters and entries in an overflow buffer. Multiple counter values are stored in a counter bank. An indication of a particular counter of the multiple counters to update is received. A current value of the particular counter is updated in the counter bank, and if an overflow condition results, then an indication of the particular counter is added to an overflow buffer. Periodically each of the multiple counters is visited and corresponding values are updated in a secondary storage, and each entry is retrieved from the overflow buffer and a corresponding value is updated in the secondary storage.

REFERENCES:
patent: 6055590 (2000-04-01), Pettey et al.
patent: 6725245 (2004-04-01), Bucska
patent: 2006/0106957 (2006-05-01), Chapman et al.

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