Correlating high-speed serial interface data and FIFO status...

Details Correlating high-speed serial interface data and FIFO status... Correlating high-speed serial interface data and FIFO status...

2007-01-09

2007-01-09

Tan, Vibol (Department: 2819)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S305000, C326S086000, C326S040000

Reexamination Certificate

active

10956684

ABSTRACT:
Status signals that are generated by one or more FIFO buffers in a high-speed serial interface (“HSSI”) may be combined with transmitted data samples in order to correlate the status signals to the respective data samples. The combined data and status signals may be transmitted either to the subsequent stages of the HSSI datapath or directly to the PLD via a dedicated path with less latency. The combined data and status signals can be used to determine whether a data sample corresponds to a valid data sample or an idle sequence, thereby allowing a user to control the flow of data.

REFERENCES:
patent: 4852088 (1989-07-01), Gulick et al.
patent: 5127004 (1992-06-01), Lenihan et al.
patent: 6650140 (2003-11-01), Lee et al.
patent: 2004/0032282 (2004-02-01), Lee et al.
patent: 2006/0095613 (2006-05-01), Venkata et al.

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