Correction of width violations of dummy geometries

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C326S101000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06892363

ABSTRACT:
Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. Correcting minimum width rule violations of non-design geometries is accomplished by forming one or more cutting areas adjoining one or more erroneous edges of a non-design geometry, and deducting the cutting areas form the non-design geometry, splitting the non-design geometry into two or more remaining non-design geometries. Any slivers of remaining non-design geometries, i.e., any pieces that are smaller than a minimum size amount, are removed. Cutting areas are formed by stretching ends of erroneous edge segments by a minimum width rule amount and sizing the stretched edge segments which are inside the non-design geometry outward by a minimum spacing rule amount.

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U.S. patent application Ser. No. 10/201,102, titled “Automated Design Rule Violation Correction When Adding Dummy Geometries To A Design Layout” filed Jul. 23, 2002, naming inventor Mu-Jing Li.
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U.S. patent application Ser. No. 10/201,071, titled “Correction Of Spacing Violations Between Design Geometries And Wide Class Objects Of Dummy Geometries” filed Jul. 23, 2002, naming inventor Mu-Jing Li.
U.S. patent application Ser. No. 10/201,044, titled “Correction Of Spacing Violations Between Wide Class Objects Of Dummy Geometries” filed Jul. 23, 2002, naming inventor Mu-Jing Li.

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