Correction of spacing violations between pure fill via areas...

Details Correction of spacing violations between pure fill via areas... Correction of spacing violations between pure fill via areas...

2005-05-17

2005-05-17

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C008S094240, C008S094240

Reexamination Certificate

active

06895568

ABSTRACT:
In a Pure Fill Via Area (PFVA) extraction design flow, the extracted PFVAs may violate the minimum via spacing rule with the existing vias and may also violate the minimum via spacing rule among themselves. Such extracted PFVA violations may be corrected in an automatable design flow not requiring user intervention by removing any portion of a PFVA falling within a minimum via spacing rule of an existing via, to form a DRC-clean PFVA relative to existing vias, and removing any portion of a DRC-clean PFVA falling within the minimum via spacing rule of another DRC-clean PFVA.

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