Electrical computers and digital processing systems: memory – Address formation – Hashing
Reexamination Certificate
2011-03-01
2011-03-01
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Hashing
C711S003000, C711S118000, C711S128000, C711SE12001, C711SE12018, C711SE12060, C711SE12063
Reexamination Certificate
active
07900020
ABSTRACT:
The application describes a data processor operable to process data, and comprising: a cache in which a storage location of a data item within said cache is identified by an address, said cache comprising a plurality of storage locations and said data processor comprising a cache directory operable to store a physical address indicator for each storage location comprising stored data; a hash value generator operable to generate a generated hash value from at least some of said bits of said address said generated hash value having fewer bits than said address; a buffer operable to store a plurality of hash values relating to said plurality of storage locations within said cache; wherein in response to a request to access said data item said data processor is operable to compare said generated hash value with at least some of said plurality of hash values stored within said buffer and in response to a match to indicate a indicated storage location of said data item; and said data processor is operable to access one of said physical address indicators stored within said cache directory corresponding to said indicated storage location and in response to said accessed physical address indicator not indicating said address said data processor is operable to invalidate said indicated storage location within said cache.
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Machine translation of JP 09034791 A to Atsushi Motohashi, Feb. 1997.
Chinnakonda Muralidharan Santharaman
Williams Gerard Richard
Williamson Barry Duane
ARM Limited
Nixon & Vanderhye P.C.
Texas Instruments Incorporated
Verbrugge Kevin
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