Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2002-11-13
2004-02-10
Chang, Daniel (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S082000, C327S108000, C327S309000
Reexamination Certificate
active
06690202
ABSTRACT:
TECHNICAL FIELD
The present invention concerns clock distribution circuits and techniques, particularly circuits and techniques related to communications circuits as well as processors and sequential logic circuits.
BACKGROUND
Electronic devices are typically coupled together to operate as systems that require the communication of data between two or more devices. Many of these devices includes a communications circuit, such as receiver, transmitter, or transceiver for this purpose.
A typical occurrence in these communication circuits is the transmission of a sequence of pulses, known as a clock, or timing, signal from an amplifier to a digital circuit, which relies on the clock signal for proper operation. Operation entails comparing the clock signal to a logic threshold voltage. If the comparison indicates that at a particular time the clock signal becomes greater than or less than the logic threshold voltage, the digital circuit initiates a particular action. However, if the digital circuit mis-perceives the clock signal, it may initiate the action too early or too late to achieve a desired effect. Thus, for proper operation, it is critical that the digital circuit accurately comprehends the clock signal.
One problem that the present inventors identified in some communications circuits concerns a phenomenon called duty-cycle distortion—that is, a distortion of the apparent magnitude (height) and/or duration (width) of the pulses in clock signals. For example, when using a high-speed amplifier to communicate a clock signal to a digital circuit in a receiver, the average (or DC) voltage of each clock signal deviates from the threshold voltage of the digital circuitry as intended, causing the digital circuit to read the clock signals as having a longer or shorter duration than intended. This ultimately causes the receiver to misinterpret some data signals received from a transmitter. (If the digital circuit is in a processor or sequential logic circuit other types of timing errors are likely to occur.)
One conventional solution to the duty-cycle distortion problem entails use of differential logic circuits. Differential logic circuits rely on voltage differences between pairs of clock signals, rather than the voltage level of a single clock signal, to ensure proper comprehension of clock signal levels and transitions. However, differential logic circuits are not only noisier, slower, and larger than single-ended logic circuits, but also less efficient.
Accordingly, the inventors have recognized a need for alternative solutions to the problem of duty-cycle distortion.
SUMMARY
To address these and other needs, the present inventors devised unique correction circuitry and related methodology for correcting duty-cycle distortion. In one exemplary embodiment, or implementation, the circuitry, which can be coupled between the output of an amplifier circuit and the input of a digital circuit, includes a pair of devices, such as a pair of resistors or a pair of field-effect transistors and a capacitor. One of the devices is coupled between a first power-supply node and the input of the digital circuit, and the other is coupled between a second power-supply node and the input of the digital circuit. The two devices act as a voltage divider, setting the DC or average voltage of signals input to the digital circuit at a level substantially matching the threshold voltage of the digital circuit, thereby reducing duty-cycle distortion. When the devices are field-effect transistors that share the same size ratio as transistors in the digital circuit, the correction circuitry reduces distortion despite not only temperature and power-supply variations, but also process variations that occur during fabrication.
In another implementation, the correction circuitry comprises a feedback circuit coupled between the output of the amplifier and the input of the digital circuit. The feedback circuit has a filter, a reference circuit, and a differential amplifier. The filter provides a filtered version of an amplifier output signal to one input of the differential amplifier, and the reference circuit provides a reference voltage, substantially equal to the threshold voltage of the digital circuit, to the other input of the differential amplifier. The differential amplifier ultimately sets the DC or average value of the input voltage to match the reference voltage, thereby reducing or correcting duty-cycle distortion.
One variant of this feedback implementation uses a voltage divider comprising two field-effect transistors that share the same size ratio as transistors in the digital circuit to develop the reference voltage. This arrangement allows the feedback circuit to precisely correct duty-cycle distortion despite not only temperature and power-supply variations that occur during operation, but also structural variations that occur during fabrication.
Other aspects of the invention include receivers, transmitters, and transceivers that incorporate the correction circuitry. Still other aspects include programmable integrated circuits and systems of electronic devices.
REFERENCES:
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patent: 5206639 (1993-04-01), Kamens
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patent: 6411145 (2002-06-01), Kueng et al.
patent: 6522323 (2003-02-01), Sasaki et al.
Boecker Charles Walter
Groen Eric Douglas
Chan H. C.
Chang Daniel
Liu Justin
Xilinx , Inc.
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