Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-10-18
2004-03-09
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C714S773000
Reexamination Certificate
active
06704922
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-367357, filed Dec. 1, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of correcting a mask used in a data program of a read only memory and a mask manufactured by the particular method.
2. Description of the Related Art
In recent years, a mask ROM (Read Only Memory) of a large capacity is used in accordance with an increase in demands for a stationary data memory. Also, a fine process technology is employed in accordance with an increase in the capacity of the mask ROM.
A mask in which the ROM data are patterned, hereinafter referred to as “ROM mask”, is used in the data program of the mask ROM. Patterns are arranged to conform with the ROM data in the ROM mask. The pattern is generally shaped square or oblong.
In the conventional technology described above, the problem described below is generated with reduction in the design rule. To be more specific, it was possible for the size of the resist in the PEP (Photo Engraving process) step to fail to form the optimum value depending on combination of the ROM data. The difficulty is generally considered to be caused by the optical proximity effect.
In order to avoid the problem noted above, and OPC (Optical Proximity Correction) technology is employedin the general mask. The OPC technology noted above represents a technology for performing the optimum correction by computer processing.
However, in the computer processing by the OPC technology, correction is applied to the figure data of the ROM mask, giving rise to the problem that a considerably long time is required for the correction. Therefore, in the mask ROM requiring a short delivery time, the ROM mask is required to be manufactured in a short time, with the result that it was impossible to make corrections by computer processing as in the general mask.
As described above, in the prior art, it was difficult to make the optimum correction in the ROM mask in a short time.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a method of correcting a mask for a data program of a read only memory, comprising: selecting an optional data from a data map comprising first data and second data, the optional data being one of the first data; and inspecting neighboring data around the optional data and, where all the neighboring data surrounding the optional data are the second data, correcting a shape of the mask in a position corresponding to the optional data.
According to a second aspect of the present invention, there is provided a mask for a data program of a read only memory, comprising holes formed in positions corresponding to first data of a data map comprising the first data and second data, the holes including a hole of first shape and a hole of second shape, the hole of first shape corresponding to the first data surrounded by the second data from within the first data, the hole of second shape corresponding to the first data be adjacent to the first data from within the first data.
REFERENCES:
patent: 09-223751 (1997-08-01), None
patent: 2000-214571 (2000-08-01), None
Hogan & Hartson LLP
Kabushiki Kaisha Toshiba
Lin Sun James
Siek Vuthe
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