Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2003-03-10
2004-10-19
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C430S005000, C430S311000, C430S319000, C430S394000
Reexamination Certificate
active
06807661
ABSTRACT:
BACKGROUND OF THE INVENTION
Masks such as photomasks are typically used in photolithographic systems to define patterns on objects such as integrated circuits. The shape of the mask, however, may sometimes differ from the pattern defined on the object. For example, optical diffraction may cause a resulting pattern defined on an integrated circuit to differ from the shape of the mask. Consequently, masks are typically adjusted to account for these deviations.
SUMMARY OF THE INVENTION
In accordance with the present invention, disadvantages and problems associated with previous techniques for correcting a mask pattern may be reduced or eliminated.
According to one embodiment of the present invention, correcting a mask pattern includes partitioning the mask pattern to yield templates. The following is repeated for each template to generate correction data: a clip mask is generated for a template selected as a main template; the main template is merged with context templates to yield a merged template; the merged template is divided to yield segments including clip segments, where an intersection of the clip mask and the merged template defines an endpoint of a clip segment; a proximity correction procedure is performed on the segments to yield a corrected template; and correction data of the corrected template is selected according to the clip mask. The correction data for the templates are aggregated to correct the mask pattern.
Certain embodiments of the invention may provide one or more technical advantages. A technical advantage of one embodiment may be that a template is divided into segments that include clip segments formed by intersections of a clip mask and the template. Short clip segments are aligned with adjacent segments to generate longer segments. By forming clip segments along the intersections and by generating longer segments from short clip segments, very small corrections that violate a minimum correction threshold may be avoided.
Certain embodiments of the invention may include none, some, or all of the above technical advantages. One or more other technical advantages may be readily skilled in the art from the figures, descriptions, and claims included herein.
REFERENCES:
patent: 6309800 (2001-10-01), Okamoto
patent: 6553558 (2003-04-01), Palmer et al.
patent: 6596444 (2003-07-01), Buck
patent: 6620561 (2003-09-01), Winder et al.
patent: 2002/0076624 (2002-06-01), Buck
patent: 2002/0160278 (2002-10-01), Winder et al.
patent: 2003/0074646 (2003-04-01), Kotani et al.
patent: 2003/0165749 (2003-09-01), Fritze et al.
Brady III W. James
McLarty Peter K.
Siek Vuthe
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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