Corner protection to reduce wrap around

Details Corner protection to reduce wrap around Corner protection to reduce wrap around

2007-03-27

2007-03-27

Pham, Hoai (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S397000, C257S510000

Reexamination Certificate

active

11048668

ABSTRACT:
A method and structure are provided with reduced gate wrap around to advantageously control for threshold voltage and increase stability in semiconductor devices. A spacer is provided aligned to field dielectric layers to protect the dielectric layers during subsequent etch processes. The spacer is then removed prior to subsequently forming a part of a gate oxide layer and a gate conductor layer. Advantageously, the spacer protects the corner area o the field dielectric and also allows for enhanced thickness of the gate oxide near the corners.

REFERENCES:
patent: 5741738 (1998-04-01), Mandelman et al.
patent: 6184071 (2001-02-01), Lee
patent: 6242788 (2001-06-01), Mizuo
patent: 6746935 (2004-06-01), De Coster et al.

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