Electrical computers and digital data processing systems: input/ – Interrupt processing – Handling vector
Reexamination Certificate
2008-05-06
2008-05-06
Ray, Gopal C. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
Handling vector
C710S260000
Reexamination Certificate
active
07370130
ABSTRACT:
A core logic device of a computer system includes a programmable interrupt controller (PIC), an input/output advanced programmable interrupt controller (I/O APIC) and a virtual wire unit. The PIC outputs a control signal to the virtual wire unit via an interrupt pin in response to an external interrupt signal asserted by a peripheral device before an operating system is loaded in the computer system. The virtual wire unit outputs an interrupt control packet to the CPU in response to the control signal wherein the interrupt vector contents carried by the interrupt control packet are ignored by the CPU. After the operating system is loaded in the computer system, the I/O APIC outputs another interrupt control packet to the CPU in response to the external interrupt signal.
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“Techniques to enable FPGA based configurable fault tolerant space computing” by Smith et al. (abstract only) Publicatio Date: Mar. 4-11, 2006.
Hsu Ming-Wei
Huang Wayne
Kirton & McConkie
Ray Gopal C.
VIA Technologies Inc.
Witt Evan R.
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