Copper interconnect patterning

Details Copper interconnect patterning Copper interconnect patterning

1998-09-11

2000-11-21

Mulpuri, Savitri

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438638, 438720, 438722, 438740, 438745, 438754, 257762, H01L 2144, H01L 21461, H01L 2348, H01L 2334

Patent

active

061502693

ABSTRACT:
A improved and new method for forming dual damascene etch back of copper lines and interconnects (studs) using a combination of oxidation of Cu and chemical/mass transport of the Cu oxide by the action of acid. The etch back solves the dishing problem in that it planarized the Cu. Etch back rates can be high at high temperatures. The surface of the substrate is kept clean and free of polishing scratches from CMP. The process produces better uniformity across the substrate and better electrical performance due the increased copper line cross-sectional area.

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