Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-07-19
2003-12-23
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S762000
Reexamination Certificate
active
06667534
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This present invention relates to the fabrication of integrated circuits. More particularly, this present invention relates to a copper fuse structure in a semiconductor and the manufacture method of the same.
2. Description of the Prior Art
Advances in semiconductor processing technologies, such as high-resolution photolithography and anisotropic plasma etching, are dramatically reducing the feature sizes of semiconductor devices and increasing the device packing density. Unfortunately, as the density of the semiconductor devices increases and the number of discrete devices increases on the chip, the final product yield for many integrated circuit devices (chip yield) can be decreased. For example, one circuit device that experiences this increase in yield loss with the increased circuit elements is the dynamic random access memory (DRAM) currently having 64 megabits of memory on a chip.
One method of overcoming this lower yield on RAM devices is to provide additional rows of memory cells and fusing each row of cells. Currently lasers are used to open the connections (fuses) in the multimegabit RAMs, such as in DRAM or SRAM devices, to disable defective rows of memory cells and to modify the address decoder so that spare rows of memory cells are selected instead.
A structure of a fuse in a semiconductor according to the prior art is shown as
FIG. 1. A
first inter-metal dielectric layer (IMD layer)
20
is deposited onto a substrate
10
. After forming a plurality of openings in the first IMD layer
20
, the first metal plugs
22
and
22
a
are filled into the openings, as shown in
FIG. 1. A
secondary IMD layer
24
is deposited onto the first IMD layer
20
and the first metal plugs
22
and
22
a
. A plurality of holes is formed in the secondary IMD layer
24
, wherein each of the holes is formed on each of the first metal plugs, and the first metal layers
26
and
26
a
are respectively filled into the holes. After repeating the above-mentioned steps, the third IMD layer
28
, the secondary metal plugs
30
and
30
a
, the forth IMD layer
32
, and the secondary metal layers
34
and
34
a
are formed thereon. Finally, a passivation
36
is deposited onto the forth metal layer
34
and the secondary metal layers
34
and
34
a
, and the passivation
36
is suffered to an etching process.
In order to coupling the secondary metal layer
34
to an external conductive layer, the secondary metal layer
34
has to be exposed after the etching process. On the other hand, the secondary metal layer
34
a
is as the fuse in the above-mentioned semiconductor. Therefore, after the etching process, a thin passivation still has to be retained on the secondary metal layer
34
a
. For the above-noted object, a well-known method in the prior art is utilizing a first mask for etching the passivation
36
on the secondary metal layer
34
to expose the secondary metal layer
34
. The passivation
36
on the secondary metal layer
34
a
is not removed during the etching process with the first mask. Subsequently, a secondary mask is employed to remove the passivation
36
on the secondary metal layer
34
a
and keep a thin passivation on the secondary metal layer
34
a.
In the prior art, the first metal plugs and the first metal layers are consisted of metallic copper, and the secondary metal plugs and the secondary metal layers are made of metallic aluminum. Generally, metallic copper is not preferred to be the composition of the fuse. The reason is that copper is a good material of heat exchange and the uppermost copper layer is usually thick. Consequently, higher energy is necessary during employing a laser repair tool to zip the copper fuse. Because the melting point of aluminum is lower than the melting point of copper, one method for resolving the problem of zipping the copper fuse is replacing the copper fuse with the aluminum fuse. So high energy is not necessary to zip an aluminum fuse. However, the cost of an aluminum fuse is higher than a copper fuse.
Hence, for improving the efficiency in manufacturing the semiconductor and saving the cost of the semiconductor, this present invention provides a copper fuse structure and the method for manufacturing the same.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for fabricating a thin copper metal layer as a fuse in a semiconductor structure so that the copper fuse according to this present invention can be easily zipped by a laser repair tool.
It is another object of this invention to lower the cost of semiconductor manufacturing by utilizing a thin copper metal layer to displace the aluminum fuse in the semiconductor structure according to the prior art.
It is still another object of this present invention to combine the processes for forming an opening on a bonding pad and forming an opening on a fuse of the semiconductor structure. That is, the openings on the bonding pad and the fuse can be formed respectively by an etching process according to this prevent invention. Consequently, the method according to this prevent invention can facilitate the semiconductor manufacture.
In accordance with the above-mentioned objects, the invention provides a structure and fabricating method for a copper fuse in a semiconductor structure. According to this prevent invention, a copper metal layer disposed in an inner layer of a semiconductor structure is employed to be a copper fuse of a semiconductor device. Moreover, an opening on the fuse and an opening on the bonding pad can be formed in the same process, wherein the bonding pad is applied to connect the semiconductor structure and environment. Therefore, it is notably that a copper fuse can be formed effectively and economically in a semiconductor structure according to this present invention.
REFERENCES:
patent: 6175145 (2001-01-01), Lee et al.
patent: 6444544 (2002-09-01), Hu et al.
Lee Chiu-Te
Wu Der-Yuan
Jackson Jerome
United Microelectronics Corp.
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