Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-10-23
2007-10-23
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S746000
Reexamination Certificate
active
10255278
ABSTRACT:
Convolutionally encoding a data stream includes inputting a first block of two or more bits in parallel into a shift register. A number of intermediate calculations are performed in parallel using a number of respective delayed shift register outputs; and said number of intermediate calculations are output to form a convolutionally encoded sequence.In one example, a register (of individual bits stored in words), is set up. The register is longer than the constraint length means that a relatively large number of input bits can be read from memory only once, thus avoiding many independent moves of operands to and from memory. Since the register is longer than the constraint length, the register need only be shifted once for every ‘a+1’ input bits, rather than once for each bit.
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Britt Cynthia
Freescale Semiconductor Inc.
Gandhi Dipakkumar
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