Converting volatile memory to non-volatile memory

Details Converting volatile memory to non-volatile memory Converting volatile memory to non-volatile memory

2002-04-04

2004-07-27

Yoha, Connie C. (Department: 2818)

Static information storage and retrieval

Systems using particular element

Flip-flop

36, 36

Reexamination Certificate

active

06768668

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to memory cells. More particularly, the invention relates to the method of converting volatile memory cells to non-volatile memory cells.
BACKGROUND OF THE INVENTION
Integrated circuits (ICs) such as digital signal processors (DSPs) include embedded on-chip memory for storage of information. The on-chip memory typically comprises, for example, an array of static random access memory (SRAM) cells connected by word lines in one direction and bit lines in another direction. SRAMs are classified as volatile memories since the stored information is lost once power is removed from the IC. Other types of volatile memories include dynamic random access memories (DRAMs).
FIG. 1
shows a conventional SRAM cell
101
. The SRAM cell comprises first and second transistors
110
and
120
coupled to a latch
130
, which stores a bit of information. One transistor is coupled to a bit line
140
and the other is coupled to a bit line complement
141
while the gates are coupled to a word line
135
. The latch includes first and second inverters
133
and
134
, each implemented with two transistors.
Another type of memory called Read-Only-Memory (ROM), is classified as non-volatile since the information is retained even when the power is off. This class of memory stores data in preprogrammed storage cells. The contents of a ROM cannot be altered once the device has been manufactured.
FIGS.
2
(
a
) and
2
(
b
) show a conventional ROM cell
201
storing one bit of information. The ROM cell comprises a transistor
202
, with a first terminal coupled to a bit line
204
, and a gate coupled to a control word line
206
. Depending on the information to be stored (i.e. logic ‘1’ or ‘0’), the second terminal of the transistor is coupled to an active high voltage source (e.g. V
DD
) as shown in FIG.
2
(
a
), or an active low voltage source (e.g. V
SS
) as shown in FIG.
2
(
b
).
During the initial development of a program, volatile memories (e.g. SRAMs or DRAMs) offer flexibility for software designers to modify the program. Since volatile memory loses its information once the power is turned off, it has to be reprogrammed every time the system is shut down. Once the program design is fixed and no further changes are required, it is desirable to replace the volatile memory with non-volatile memory (e.g. ROMs) to retain the information even after the power is turned off.
The conversion of volatile memories such as DRAMs or SRAMs to non-volatile memories such as different types of ROMs typically involves complete layout modifications as the two types of memories are of different sizes. Such massive changes will result in large costs and low efficiency in production.
As evidenced from the above discussion, it is desirable to provide an improved method of converting volatile memory to non-volatile memory with minimal modifications.
SUMMARY OF THE INVENTION
The invention relates to a method for converting volatile memory cells to non-volatile memory cells. In one embodiment of the invention, a volatile memory cell comprising two access transistors and one storage transistor is converted to a non-volatile memory cell by deactivating one access transistor via a control word line which is coupled to an active low voltage source, and activating the storage transistor by supplying the gate of the storage transistor with an active high voltage level.
In accordance with one embodiment of the invention, one terminal of the storage transistor is coupled either to the active low voltage source via the control word line, or to the active high voltage source, depending on logic states to be stored.
These and additional features of the present invention will be described in more detail in the following figures and detailed description of the invention.


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IBM Technical Disclosure Bulletin, Mar., 1981, pp. 4620-4621. Delphion, “Read Write Dynamic Memory Using Two Devices Per Cell and Having Internal Refresh.”

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