Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-08-28
2007-08-28
Dildine, R. Stephen (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S763000, C714S773000
Reexamination Certificate
active
10710860
ABSTRACT:
A converting circuit, for preventing wrong error correction code from occurring due to an error correction rule during data reading operation is provided. When the flash memory controller writes all 0xFF data into the flash memory, the byte error correction rule generates a set of correct error correction codes and the error correction code converting circuit converts the set of correct error correction codes into 0xFF error correction codes, and values stored in the data area and error correction code area of the flash memory are converted into 0xFF to prevent wrong error correction code from occurring during data reading operation when the error correction codes are not completely 0xFF.
REFERENCES:
patent: 2002/0170015 (2002-11-01), Hornung et al.
patent: 2005/0172086 (2005-08-01), Kawai
patent: 2007/0016721 (2007-01-01), Gay
Wikimedia Foundation, Inc., Hexadecimal, Jan. 27, 2007, Wikipedia, the free encyclopedia, pp. 1-7, URL: http://en.wikipedia.org/wiki/Hexadecimal.
Gan Wee-Kuan
Hsu Chih-Jen
Dildine R. Stephen
Jianq Chyun IP Office
Phison Electronics Corporation
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