Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2005-10-18
2005-10-18
Chang, Daniel D. (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S073000, C326S077000
Reexamination Certificate
active
06956400
ABSTRACT:
The invention relates to a converter from ECL to CMOS having an input stage (Q1, Q2, N3, N4), a level shifter stage (N1, N2, N5, R1, R2, R3) including an NFET differential stage (N1, N2), and an output stage (P1, P2, P3, P4, N6, N7, N8, N9), and to a network element for transmitting signals which comprises a converter from ECL to CMOS having an input stage (Q1, Q2, N3, N4), a level shifter stage (N1, N2, N5, R1, R2, R3), and an output stage (P1, P2, P3, P4, N6, N7, N8, N9), with the level shifter stage (N1, N2, N5, R1, R2, R3) including an NFET differential stage (N1, N2).
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Alcatel
Chang Daniel D.
Sughrue & Mion, PLLC
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