Convergence technique for model-based optical and process...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07028284

ABSTRACT:
Layout correction is accomplished using a forward mapping technique. Forward mapping refers to mapping of fragments from a reticle layout to a target layout, while backward mapping refers to mapping of fragments from the target layout to the reticle layout. Forward mapping provides a technique for making an unambiguous mapping for each reticle fragment to a corresponding target layout fragment. The mapping does not necessarily provide a one-to-one correspondence between reticle fragments and target layout fragments. That is, multiple reticle layout fragments can map to a single target layout fragment. An edge placement error for the target layout fragments is used to make positioning corrections for the corresponding reticle fragment(s). Edge placement error can be determined, for example, with a simulation process that simulates a manufacturing process using the reticles.

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