Controlling warping in integrated circuit devices

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Warping of semiconductor substrate

Reexamination Certificate

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C257SE23045

Reexamination Certificate

active

07923347

ABSTRACT:
Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die.

REFERENCES:
patent: 5834848 (1998-11-01), Iwasaki
patent: 6291899 (2001-09-01), Wensel et al.
patent: 7084489 (2006-08-01), Thurgood
patent: 7164200 (2007-01-01), Brennan et al.
patent: 2005/0189616 (2005-09-01), Brennan et al.

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