Controlling data flow between processor systems

Details Controlling data flow between processor systems Controlling data flow between processor systems

2007-05-08

2007-05-08

Huynh, Kim (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C710S022000, C710S048000, C710S052000

Reexamination Certificate

active

09964681

ABSTRACT:
Direct memory access data transfers may be initiated between buffers on one processor system to corresponding buffers in another processor system. The buffers in each system may be provided as a linked list such that transfers successively occur between the buffers. Each buffer may include a descriptor that indicates whether or not the buffer is full or empty. As a result, the buffer may be accessed by controllers in either processor system.

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