Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2011-01-04
2011-01-04
Thomas, Shane M (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S135000, C711S207000, C712S034000
Reexamination Certificate
active
07865675
ABSTRACT:
A data processing apparatus2includes a programmable general purpose processor10coupled to a hardware accelerator12. A memory system14, 6, 8is shared by the processor10and the hardware accelerator12. Memory system monitoring circuitry16is responsive to one or more predetermined operations performed by the processor10upon the memory system14, 6, 8to generate a trigger to the hardware accelerator12for it to halt its processing operations and clean any data values held as temporary variables within registers20of the hardware accelerator back to the memory system14, 6, 8.
REFERENCES:
patent: 5845327 (1998-12-01), Rickard et al.
patent: 6684305 (2004-01-01), Deneau
patent: 2003/0028751 (2003-02-01), McDonald et al.
patent: 2004/0215898 (2004-10-01), Arimilli et al.
patent: 2005/0216701 (2005-09-01), Taylor
patent: 2006/0064546 (2006-03-01), Arita et al.
patent: 2006/0200802 (2006-09-01), Mott et al.
patent: 2007/0199046 (2007-08-01), O'Brien
patent: 2008/0098205 (2008-04-01), Dolve et al.
patent: 2008/0222383 (2008-09-01), Spracklen et al.
patent: WO 99/61982 (1999-12-01), None
patent: WO 99/61989 (1999-12-01), None
patent: WO 2004/046916 (2004-06-01), None
patent: WO 2005/101213 (2005-10-01), None
patent: WO 2006/131921 (2006-12-01), None
M. Vuletic et al, “Multithreaded Virtual-Memory-Enabled Reconfigurable Hardware Accelerators” IEEE Conf. Field Programmable Technology, Dec. 2006, pp. 197-204.
UK Search Report dated Jan. 19, 2009 for GB 081825.1.
UK Search Report dated Feb. 23, 2009 for GB 0820711.0.
UK Search Report dated Feb. 20, 2009 for GB 0820439.8.
U.S. Appl. No. 12/003,858, Paver et al., filed Jan. 2, 2008.
U.S. Appl. No. 12/003,857, Paver et al, filed Jan. 2, 2008.
Biles Stuart David
Paver Nigel Charles
ARM Limited
Nixon & Vanderhye P.C.
Thomas Shane M
LandOfFree
Controlling cleaning of data values within a hardware... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Controlling cleaning of data values within a hardware..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Controlling cleaning of data values within a hardware... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2627246