Controlling capacitive load

Details Controlling capacitive load Controlling capacitive load

1995-08-25

1998-03-10

Dinh, Son T.

Static information storage and retrieval

Floating gate

Particular biasing

36518524, 36518911, G11C 700

Patent

active

057269360

ABSTRACT:
A capacitive load such as the array ground line of a flash memory is initially pulled up towards a positive voltage via a first relatively weak current source, and subsequently a stronger source is switched to the load. To pull the load down, the pull up sources are turned off, and a relatively weak pull-down current source switched to the load. Subsequently a stronger pull-down source is switched to the load.
The arrangement may avoid high transient currents while ensuring adequate quiescent sourcing ability.

REFERENCES:
patent: 4996571 (1991-02-01), Kume et al.
patent: 5095461 (1992-03-01), Miyakawa et al.
patent: 5229963 (1993-07-01), Ohtsuka et al.
patent: 5301151 (1994-04-01), Wells et al.
patent: 5319594 (1994-06-01), Uemura et al.
patent: 5396463 (1995-03-01), Kim et al.

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