Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Reexamination Certificate
1998-09-10
2001-09-11
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Slip control, misaligning, boundary alignment
C710S034000, C711S154000, C711S171000
Reexamination Certificate
active
06289427
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and a method for controlling a memory, and a program included in a medium readable by a computer, and more particularly, to a technology for controlling the reading to, and writing from, a memory.
2. Description of the Related Art
Recently, with the progress of digital techniques, an apparatus has been developed for transmitting a large amount of digital data (e.g., dynamic image data) with a relatively low rate to a recording medium and the like by reducing the amount of data by compressing/encoding them.
As an apparatus of this kind, the most recently, a format of a digital VTR which records/reproduces the digitized video signals for a magnetic tape has been standardized, according to the HD public welfare digital VCR council.
In the digital VTR based on this standard, the input video signal is compressed/encoded by using DCT techniques, quantization, and variable-length encoding. The amount of information thereof is thereby compressed from about 125 Mbps into about 25 Mbps. Through a memory, the detection/correction codes (e.g., the Reed-Solomon iterated (product) code) for use in error detection/correction are added to the video signals which are compressed as described above, and recorded into the magnetic tape in a predetermined data format.
Furthermore, the video signals which are generated in accordance with the standard might be packetized for each data block in a predetermined unit, and transmitted to an external recording device and the like through a high speed digital interface.
However, when recording/reproducing the digital video signals which are compressed/encoded according to the digital VTR in real time, or when transmitting/receiving them from an external device (e.g., other digital VTR) in real time, usually, a memory for temporarily storing the video signals of predetermined units is required.
For example, when transmitting the digital video signals which are generated at the digital VTR in real time to an outside device through a transmission line having a speed different from that of the signals, because the digital video signal to be transmitted is matched with the transmission speed of the transmission line, on a transmission side, it is necessary to temporarily hold them in the memory. Then, the transmission side reads and outputs the digital video signals which are held in the memory one by one, per data for one packet by matching the transmission speed of the transmission line.
Also, similarly, when receiving the packets transmitted from an outside device one after another, it is necessary to temporarily hold the data of the respective packets in order to return the speed of the data of the respective packets received to the speed of the original digital video signals.
When reading the data being held in the memory per data of one packet, or when writing them into the memory per data of one packet, there exist the following problems.
For example, when the timings for reading the data per one packet from the memory have deviated, there was a case that all of the data of that packet could not be read. As a result, since the rest of data which remained in the memory is read together with the data which is to be read at the next data read time period, the data might have not the proper arrangement.
Furthermore, when the timings for writing the data per one packet from the memory have deviated, there was a case that all of the data of that packet could not be written. As a result, since a portion of the data is written together with the data which is to be written into the memory at the next data write time, that written data might have not the proper arrangement.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the above-mentioned problems.
Another object of the present invention is to implement a process of holding an absence of the data at minimum, even when the timings for reading or writing the data have deviated, in the apparatus and method for controlling a memory, and in the program for controlling a memory, which is stored in a medium readable by a computer.
One preferred embodiment of the present invention is directed to a memory control device including, means for detecting a quantity of data written into a memory or a quantity of a data read from the memory, means for comparing the detected quantity of data with a predetermined value, and means for controlling a writing position or a reading position of the memory in accordance with the comparison result.
Further, another embodiment of the present invention is directed to a memory control method including, detecting a quantity of data written into a memory or a quantity of data read from the memory, comparing the detected data quantity with a predetermined value, and controlling the writing position or the reading position of the memory based on the comparison result.
Another embodiment of the present invention is directed to a computer-readable storage medium containing a program for controlling a memory which, when executed, causes to be performed a method, including the steps of detecting a quantity of data written into a memory or a quantity of data read from the memory, comparing the detected data quantity with a predetermined value, and controlling the writing position or the reading position of the memory based on the comparison result.
Another object of the present invention is to implement a process of minimizing a lack of data when the timing for writing the data has deviated, in the receiver, its corresponding method, and in a computer-readable storage medium containing a program for controlling the receiving process.
The preferred embodiment for the present invention is also directed to the receiver including means for receiving a plurality of packets transmitted at a predetermined communication cycle, a memory for writing data included in a received packet, means for evaluating a quantity of data written into the memory, and means for controlling the writing position of the memory based on the evaluation result.
Another embodiment of the present invention is directed to a receiving method including the steps of receiving a plurality of packets to be transmitted at a predetermined communication cycle, writing data included in a received packet into memory, evaluating a quantity of the data written into memory, and controlling the writing position of the memory based on the evaluation result.
Another embodiment of the present invention is directed to a computer-readable storage medium containing a program for controlling a receiving process which, when executed, causes a method to be performed, including the step of receiving a plurality of packets transmitted at a predetermined communication cycle, writing the data included in the received packet into memory, evaluating a quantity of the data written into memory, and controlling the writing position of the memory based on the evaluation result.
Another object of the present invention is to implement a process of minimizing a lack of data when the timing for reading the transmission data has deviated, in the transmitter, its corresponding method, and computer-readable storage medium containing a program for controlling the transmitting process.
The preferred embodiment for the present invention is also directed to such objects, a transmitter, including, a memory capable of storing a predetermined quantity of data, means for generating a packet from the data read from memory, and for transmitting the packet at a predetermined communication cycle, means for evaluating a quantity of the data read from memory, and means for controlling a reading position of said memory based on the evaluation results.
Another embodiment of the present invention is directed to a transmitting method including the steps of storing a predetermined quantity of data in memory, generating a packet from a data read from memory, and transmitting the packet at a predetermined communication cycle, evaluating a quantity of the data read from
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Nguyen Hiep T.
Portka Gary J.
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