Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2005-01-11
2005-01-11
Lane, Jack (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S103000, C365S236000, C365S185050, C365S185300
Reexamination Certificate
active
06842840
ABSTRACT:
A system for determining whether a memory is connected to a controller in a node of a data network. In order to utilize non-volatile memory elsewhere in the system, it is possible to eliminate the EEPROM which is normally connected to the controller. In order to indicate that the EEPROM is deliberately missing, a pull-up resistor connected to a voltage source is connected to the chip select signal line which normally runs between the controller and the EEPROM. If a high signal is received, the controller knows that the EEPROM is deliberately missing and that non-volatile memory will be provided elsewhere in the system.
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Collins Brian M.
Reohr, Jr. Richard D.
Intel Corporation
Lane Jack
Steiner Paul E.
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