Controller limiting modification of cache based upon amount of d

Details Controller limiting modification of cache based upon amount of d Controller limiting modification of cache based upon amount of d

1996-12-24

2000-11-14

Robertson, David L.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

G06F 1300

Patent

active

061483672

ABSTRACT:
In allocating an area of a cache memory to each storage unit, proper allocation of the cache memory is made to each storage unit. If the amount of write-after data becomes equal to or more than a threshold value, an allocation limit is set to each disk unit. If CPU issues a data write request requiring the amount of data equal to or more than the allocation limit, the data write request is held in a wait state until the amount of write-after data becomes less than the allocation limit. Therefore, the allocation amount to the disk unit becomes neither too large nor too small. In this manner, proper allocation of the cache memory to each disk unit can be realized.

REFERENCES:
patent: 4503501 (1985-03-01), Coulson et al.
patent: 4654819 (1987-03-01), Stiffler et al.
patent: 4916605 (1990-04-01), Beardsley et al.
IBM Tech. Disc. Bulletin; Preventing Overflow in a Wraparound Buffer; vol. 32, No. 11; Apr. 1990; pp. 81-82.

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