Controller for controlling nonvolatile memory unit

Details Controller for controlling nonvolatile memory unit Controller for controlling nonvolatile memory unit

2001-09-18

2004-02-03

Robertson, David L. (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S156000

Reexamination Certificate

active

06687784

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-368849, filed Dec. 4, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a controller for controlling a nonvolatile memory unit, useful when an abnormality has occurred while data is being written into the nonvolatile memory unit.
2. Description of the Related Art
Memory systems equipped with nonvolatile memory units, such as memory cards used as memory units that store various types of data such as image and music data, have recently become available. The nonvolatile memory unit is formed of at least one rewritable nonvolatile memory from which no stored data disappears even if the power is turned off.
Even in the nonvolatile memory unit, it is possible in the following case that data stored therein may be damaged. For example, a case where an abnormality, such as an interruption of the supply of power to the memory unit during a data write operation or a reduction in the power supply voltage of the unit, i.e. a write abnormality, has occurred. Data is also damaged when, because of a write abnormality, data that has not completely been written remains in the nonvolatile memory or data erasure is not completely executed. If management information stored in the nonvolatile memory to manage the memory itself is once damaged by a write abnormality, it is possible that no more normal writing will be executed or all data will be lost, even if a correct power voltage is supplied to the memory unit after the damage.
Jpn. Pat. Appln. KOKAI Publication No. 7-200418 proposes a semiconductor memory device equipped with a data storage section (nonvolatile memory unit) formed of a flash memory, in which even if the supply of power is interrupted while data is being written into the data storage section, data writing can be resumed after power is resupplied. This semiconductor memory device comprises a first memory that temporarily stores data transferred from a host device, a second memory that stores control information necessary to transfer data from the first memory to the data storage section, and a CPU (control means). The first and second memories are each formed of a nonvolatile memory, such as an FRAM (Ferroelectric Random Access Memory) (a registered trademark) that can temporarily store information even if no power is supplied to the semiconductor memory device, and can operate at a higher speed than the flash memories. When the supply of power has been interrupted while data is being transferred from the first memory to the data storage section, the CPU rewrites the transfer-interrupted data into the data storage section after power is resupplied. This rewriting is executed on the basis of control information stored in the second memory.
In the published technique, even if the supply of power is interrupted while data is being written into the data storage section (nonvolatile memory unit), the data writing is resumed after power is resupplied. To this end, however, the first and second memories (nonvolatile memories), which can hold data even if no power is supplied, are required as well as a memory for the data storage section.
BRIEF SUMMARY OF THE INVENTION
The present invention has been developed in light of the above and aims to enable a nonvolatile memory unit to be kept normally even if an abnormality occurs for some reason while data is being written into the nonvolatile memory unit, and hence to enable the memory unit to be used normally after the cause of the write abnormality is eliminated, without using any memory for holding data other than the memory unit's memory.
According to an aspect of the invention, there is provided a controller for controlling a nonvolatile memory unit that is formed of at least one nonvolatile memory. The nonvolatile memory unit stores management information for controlling the nonvolatile memory unit. The controller comprises management information writing means, old management information flag writing means, search means and restoration means. The management information writing means writes, after writing of data into the nonvolatile memory unit, new management information that reflects the writing of data, into an area of the nonvolatile memory unit other than an area of the nonvolatile memory unit which stores last management information. The old management information flag writing means writes, after the management information writing by the management information writing means, an old management information flag indicating that management information written by the management information writing means is old management information, in relation to the last management information stored in the nonvolatile memory unit. The search means searches the nonvolatile memory unit for updated, normal management information when the nonvolatile memory unit is initialized. The restoration means restores updated management information on the basis of normal old management information related to the old management information flag, if the search means does not find the updated, normal management information.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.


REFERENCES:
patent: 5602987 (1997-02-01), Harari et al.
patent: 5644539 (1997-07-01), Yamagami et al.
patent: 5802551 (1998-09-01), Komatsu et al.
patent: 2001/0049764 (2001-12-01), Lu et al.
patent: 07-200418 (1995-08-01), None

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