Fishing – trapping – and vermin destroying
Patent
1995-03-29
1996-08-06
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437 78, 437190, H01L 218242
Patent
active
055433480
ABSTRACT:
A method of forming a coupled capacitor and transistor is provided. A trench is formed in a semiconductor substrate and an impurity-doped first conductive region is then formed by filling the trench with an impurity-doped first conductive material. The impurity-doped first conductive region is etched back to a first level within the trench. An insulating layer is then formed on a sidewall of the portion of the trench opened by the etching back of the impurity-doped first conductive region and a second conductive region is formed by filling the remainder of the trench with a second conductive material. The insulating layer and the second conductive region are etched back to a second level within the trench and an amorphous silicon layer is formed in the portion of the trench opened by the etching back of the insulating layer and the second conductive region. The undoped amorphous silicon layer is etched back to a third a level within the trench. The undoped amorphous silicon layer is then recrystallized. Impurities are outdiffused from the impurity-doped first conductive region to the semiconductor substrate through the recrystallized silicon layer. A source/drain region of the transistor is formed adjacent to an intersection of the trench and the surface of the semiconductor substrate. The outdiffused impurities and the recrystallized silicon layer constitute a buried strap for electrically connecting the first and second conductive layers in the trench to the source/drain region.
REFERENCES:
patent: 4444620 (1984-04-01), Kovacs et al.
patent: 4509990 (1985-04-01), Vasudev
patent: 4584025 (1986-04-01), Takaoka et al.
patent: 4659392 (1987-04-01), Vasudev
patent: 4716548 (1987-12-01), Mochizuki
patent: 4753895 (1988-06-01), Mayer et al.
patent: 4816893 (1989-03-01), Mayer et al.
patent: 4820652 (1989-04-01), Hayashi
patent: 4824793 (1989-04-01), Richardson et al.
patent: 4826300 (1989-05-01), Efron et al.
patent: 4849371 (1989-07-01), Hansen et al.
patent: 4853342 (1989-08-01), Taka et al.
patent: 4910709 (1990-03-01), Dhong et al.
patent: 4915746 (1990-04-01), Welsch
patent: 4916524 (1990-04-01), Teng et al.
patent: 4942554 (1990-07-01), Kircher et al.
patent: 4988637 (1991-01-01), Dhong et al.
patent: 5116768 (1992-05-01), Kawamura
patent: 5138420 (1992-08-01), Komori et al.
patent: 5168073 (1992-12-01), Gonzalez et al.
patent: 5168366 (1992-12-01), Sasaki
patent: 5185294 (1993-02-01), Lam et al.
patent: 5192703 (1993-03-01), Lee et al.
patent: 5262662 (1993-11-01), Gonzalez et al.
patent: 5292678 (1994-03-01), Dhong et al.
patent: 5308783 (1994-05-01), Krautschneider et al.
patent: 5312768 (1994-05-01), Gonzalez
patent: 5336629 (1994-08-01), Dhong et al.
patent: 5360758 (1994-11-01), Bronner et al.
patent: 5376566 (1994-12-01), Gonzalez
patent: 5380673 (1995-01-01), Yang et al.
patent: 5413950 (1996-05-01), Chen et al.
patent: 5422294 (1995-06-01), Noble, Jr.
Hammerl Erwin
Ho Herbert L.
Mandelman Jack A.
Shiozawa Jun-ichi
Stengl Reinhard J.
Chaudhari Chandra
International Business Machines Corp.
Kabushiki Kaisha Toshiba
Siemens Aktiengesellschaft
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