Controlled phase noise generation method for enhanced testabilit

Details Controlled phase noise generation method for enhanced testabilit Controlled phase noise generation method for enhanced testabilit

1997-03-31

2000-06-13

Chung, Phung M.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error count or rate

714814, 714815, G06F 1100

Patent

active

06076175&

ABSTRACT:
A transmitter/receiver chip includes circuitry for testing the bit error rate of the chip. A controlled amount of noise is introduced to the chip to vary a timing parameter of a transmit clock, resulting in an increase in a bit error rate of the chip. Artificially increasing the bit error rate of the chip reduces the amount of time required to test the chip to determine the acceptability of the chip and its actual bit error rate.

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patent: 5446914 (1995-08-01), Paul et al.
patent: 5481563 (1996-01-01), Hamre
patent: 5515404 (1996-05-01), Pearce

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