Controlled delay circuit for use in synchronized semiconductor m

Details Controlled delay circuit for use in synchronized semiconductor m Controlled delay circuit for use in synchronized semiconductor m

1997-05-13

1998-06-16

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Signals

36518905, 327276, 327278, 327158, 327161, H03H 1126

Patent

active

057681775

ABSTRACT:
A controlled delay circuit for use in a synchronized semiconductor memory, comprises a reference delay, a delay circuit for controlling an internal circuit, and a comparing and adjusting circuitry comparing a delay amount of the reference delay with a cycle of an external synchronous signal, at a mode register setting time, for automatically adjusting a delay time of the delay circuit on the basis of the result of the comparison.

REFERENCES:
patent: 5570294 (1996-10-01), McMinn et al.
patent: 5668491 (1997-09-01), Higashisaka et al.

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