Controllable delay device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction

Reexamination Certificate

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Details

C327S161000, C327S269000, C327S262000, C327S158000, C327S277000, C327S153000, C375S371000, C375S376000, C375S226000, C702S176000, C702S177000, C716S030000, C716S030000

Reexamination Certificate

active

07620857

ABSTRACT:
Two delay chains having in each case n series-connected unidirectional delay elements are provided for controllably delaying electrical signals between a circuit input and at least one circuit output. Each delay element is an active circuit with a fixed transit time. The input of the first delay element of the first chain is connected to the circuit input and the output of each delay element of the first delay chain is selectively connectable to the input of the (n−i+1)th delay element of the second delay chain via a respectively associated switch of a first group of switches, wherein i=1 . . . n is the ordinal number of the delay elements of the first delay chain. The output of the last delay element of the second chain is connected as a circuit output.

REFERENCES:
patent: 5355037 (1994-10-01), Andresen et al.
patent: 5570383 (1996-10-01), Brown et al.
patent: 5727021 (1998-03-01), Truebenbach
patent: 5777501 (1998-07-01), AbouSeido
patent: 2003/0182595 (2003-09-01), Carnevale et al.
patent: 2005/0055614 (2005-03-01), Yeh
patent: 2005/0246596 (2005-11-01), Chen et al.
patent: 0866555 (1998-09-01), None
patent: 200284170 (2002-03-01), None

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