Controllable conduction device with electrostatic barrier

Details Controllable conduction device with electrostatic barrier Controllable conduction device with electrostatic barrier

2006-11-07

2006-11-07

Ngô, Ngân V. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S192000, C257S330000

Reexamination Certificate

active

07132713

ABSTRACT:
A controllable conduction device in the form of a transistor comprises source and drain regions5, 2between which extends a conduction path P for charge carriers, a gate4for controlling charge carrier flow along the conduction path and a multiple layer structure3providing a multiple tunnel junction configuration in the conduction path, with the result that current leakage is blocked by the multiple tunnel junction configuration when the transistor is in its off state. Vertical and lateral transistor configurations are described, together with use of the transistor in complimentary pairs and for a random access memory cell. Improved gate structures are described which are also applicable to memory devices that incorporate the tunnel barrier configuration to store charge on the memory node.

REFERENCES:
patent: 4692997 (1987-09-01), Calviello
patent: 5021839 (1991-06-01), Yamazaki
patent: 5055887 (1991-10-01), Yamazaki
patent: 5093699 (1992-03-01), Weichold et al.
patent: 5117268 (1992-05-01), Nishizawa et al.
patent: 5155054 (1992-10-01), Itoh
patent: 5216262 (1993-06-01), Tsu
patent: 5241214 (1993-08-01), Herbots et al.
patent: 5313117 (1994-05-01), Maezawa
patent: 5430011 (1995-07-01), Tanaka et al.
patent: 5432362 (1995-07-01), Lippens et al.
patent: 5436474 (1995-07-01), Banerjee et al.
patent: 5451800 (1995-09-01), Mohammad
patent: 5606177 (1997-02-01), Wallace et al.
patent: 5608231 (1997-03-01), Ugajin et al.
patent: 5629231 (1997-05-01), Kiehl
patent: 5714766 (1998-02-01), Chen et al.
patent: 5780898 (1998-07-01), Tamaki et al.
patent: 5920088 (1999-07-01), Augusto
patent: 5937295 (1999-08-01), Chen et al.
patent: 5962864 (1999-10-01), Leadbeater et al.
patent: 0 145 403 (1985-06-01), None
patent: 0 202 755 (1986-11-01), None
patent: 0 249 204 (1987-12-01), None
patent: 0 649 174 (1995-04-01), None
patent: 0 700 093 (1996-03-01), None
patent: 0 750 353 (1996-12-01), None
patent: 2 295 488 (1996-05-01), None
patent: 5-291591 (1993-11-01), None
patent: 8-97305 (1996-04-01), None
patent: 8-181295 (1996-07-01), None
patent: A 8-306905 (1996-11-01), None
patent: 9-116106 (1997-05-01), None
patent: H09-240030 (2003-07-01), None
patent: WO 94/15340 (1994-07-01), None
Patent Abstracts of Japan, vol. 12, No. 246, Jul. 12, 1988 & JP 63 034975 (Hitachi, Ltd.), Feb. 15, 1988.
ANONYMOUS:Superlattice Tailoring to Obtain Devices With High Saturation Velocity, IBM Technical Disclosure Bulletin, vol. 29, No. 7, Dec. 1986, New York, US; pp. 2931-2932.
Austing D. G. et al.:Single Electron Tunneling in Sub-Micron AlGaAs/GaAs Double Barrier Transistor Structures, Solid State Electronics, vol. 40, No. 1/08, Jan. 1, 1996; pp. 237-240.
Patent Abstracts of Japan, vol. 97, No. 2, Feb. 28, 1997 & JP 08 264807 (Nippon Telegr 7 Amp; Teleph Corp. & LT; NTT&GT), Oct. 11, 1996.
Ahmed H. et al.:Single-Electron Devices; Microelectronic Engineering, vol. 32, No. 1/4, Sep. 1996; pp. 297-315.
Wen-Shiung Lour:Fabrication of Voltage-Controlled Strained-Layer Quantum Well Three-Terminal Switching Device, Solid State Electronics, vol. 38, No. 3, Mar. 1, 1995; pp. 557-560.
Wei Y. et al.:Controlled Growth of Si), Tunnel Barrier and Crustalline Si Quantum Wells For Si Resonant Tunneling Diodes, Journal of Applied Physics, vol. 81, No. 9, May 1, 1997; pp. 6415-6424.
Austing D.G. et al.:A New Design for Submicron Double-Barrier Resonant Tunneling Transistors, Semiconductor Science and Technology, vol. 11, No. 3, Mar. 1, 1996; pp. 388-391.
Capasso F. et al.:Quantum Functional Devices: Resonant-Tunneling Transistors, Circuits with Reduced Complexity, and Multiple-Valued Logic, IEEE Transactions on Electron Devices, vol. 36, No. 10, Oct. 1, 1989; pp. 2065-2082.
Patent Abstracts of Japan, vol. 96, No. 8, Aug. 30, 1996 & JP 08 097305 (Hitachi, Ltd.), Apr. 12, 1996.
Nakazato K. et al.:Enhancement of Coulomb Blockade in Semiconductor Tunnel Junctions, Applied Physics Letters, vol. 66, No. 23, Jun. 5, 1995; pp. 3170-3172.
Nakazato K. et al.:Single-Electron Memory, Journal of Applied Physics, vol. 75, No. 10, May 15, 1994; pp. 5123-5134.
Uemura T. et al.:Large Enhancement of Interbrad Tunneling Current Densities of Over 105Alcm2in In0.53Ga0.47As-Based Surface Tunnel Transistors, IEEE Electron Device Letters, vol. 18, No. 5, May 1997; pp. 225-227.
Patent Abstracts of Japan, vol. 11, No. 33, Jan. 30, 1987 & JP 61 201470 (Mitsubishi Electric Corp.), Sep. 6, 1986.
Patent Abstracts of Japan, vol. 95, No. 1, Feb. 28, 1995 & JP 06 302623 (NEC Corp.), Oct. 28, 1994.
Japanese Journal of Applied Physics, vol. 36, No. 3B, Part 1, Mar. 1997, pp. 1667-1671, D. G. Austing et al.:GaAs/AlGaAs/InGaAs Vertical Triple Barrier Single Electron Transistors.
Applied Physics Letters, Aug. 10, 1987, USA, vol. 51, No. 6, pp. 445-447, T. Nakagawa et al.:Thermally stimulated resonant current in AIGaAs/GaAs triple barrier diodes.
IBM Technical Disclosure Bulletin, vol. 29, No. 7, Dec. 1986; pp. 2931-2932.
IEEE Transacitons on Electron Devices, vol. ED-32, No. 2, Feb. 1985, Mehrdad M. Moslehi et al.:Thermal Nitridation of Si and SiO, for VLSI.
Applied Physics Letters 64 (11), Mar. 14, 1994, H.I. Liu et al.:Self-limiting oxidation for fabricating sub-5nm silicon nonowires.
Applied Physics Letters 70(3), Jan. 20, 1997, Hiroshi Fukuda et al.:Fabrication of silicon nanopillars containing polycrystalline silicon/insulator multi-layer structures.
Austing, et al., “GAAS/ALGAAS/INGAAS Vertical Triple Barrier Single Electron Transistors,” Jpn. J. Appl. Phys., vol. 36 (1997) (5 pgs.), Part 1, No. 3B, Mar. 1997, Japan.
Fukuda, et al., “Fabrication of silicon nanopillars containing polycrystalline silicon/insulator multilayer structures,” Appl. Phys. Lett. 70 (3), Jan. 20, 1997, California.
Translation of Japanese Office action mailed Jan. 31, 2006.

Affiliated with

Also associated with

Rating

Controllable conduction device with electrostatic barrier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Controllable conduction device with electrostatic barrier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Controllable conduction device with electrostatic barrier will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3706351