Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2002-07-17
2004-06-29
Ray, Gopal C. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S052000, C710S022000, C709S241000, C370S252000
Reexamination Certificate
active
06757776
ABSTRACT:
TECHNICAL FIELD
This disclosure relates to transaction handling, and, more particularly, to efficiently handling control transactions in a configurable USB (Universal Serial Bus) device controller.
BACKGROUND
A USB (Universal Serial Bus) carries data communication between a host computer and devices coupled to the computer via the bus. USB specifications 1.1 and 2.0 define a method of how a host makes requests of a device, which is by using what are termed control transactions. Generally, when the host desires a device to perform some function, the host sends a control transaction via the bus to the device. The device decodes the control transaction and acts on it. Control transactions are broken into three stages: a setup stage, an optional data stage, and a status stage.
A host begins a control transaction directed to a device by sending a setup token to the device. The setup token alerts the device that an 8-byte data packet is being sent, which is part of the setup stage and describes the request to be completed by the device. The device decodes the setup packet to determine, among other things, whether the host is sending a data stage.
Occasionally, the host will cancel a current transaction request by sending a second request before the first request has been completely processed. Specifically, if a new setup token is received by the device prior to receiving the data stage and/or status stage of the prior request, the device flushes the old request and immediately begins processing the new request contained in the new setup stage.
Earlier devices allocated a specific portion of memory space to store the setup stage data. These devices used a handshake protocol so that the processor could determine if a second request had arrived while the processor was responding to the first request. However, there is a serious potential problem in implementing this requirement in newer, microprocessor based device controllers that use a FIFO (First In First Out) buffer memory to buffer data from the host until such time that the microprocessor can operate on it. Oftentimes the FIFO buffer in such a device is also used for DMA (Direct Memory Access) transfers between the FIFO and a system memory. With such a system, it is possible to transfer out of the device by DMA a newly received setup token or setup data that was received from the host and temporarily stored in the FIFO, prior to the device recognizing that it ever received such a token or data.
Embodiments of the present invention prevent this and other problems in handling control transactions.
SUMMARY OF THE INVENTION
Embodiments of the invention prevent data from being mishandled at a device connected to a host by using a system that verifies that data received after receiving a setup command is received without errors and/or without receiving a second setup command used to cancel the first. In some embodiments, a control transaction is processed by receiving a setup token, preparing a predetermined memory location to store setup data, and then preventing any setup data from being acted on until the device verifies that no superceding commands have been received by the device.
Other embodiments of the invention are directed toward the device itself. Such a device can include a port to receive a control transaction, and a pair of pointer controllers. The first controller resets a write pointer of a data buffer to a preset memory location in the data buffer. The second controller locks a read pointer in the place it was in when the control transaction was received.
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patent: 6205501 (2001-03-01), Brief et al.
patent: 6449666 (2002-09-01), Noeldner et al.
patent: 6678760 (2004-01-01), Brief
“Laboratories for data communication and computer networks” by R. Goyal, S Lai, R. Jain and A. Durresi (abstract only).*
“Service guarantees in deflection networks” by W. Olesinski and P. Gburzynski (abstract only).
Cypress Semiconductor Corp.
Marger Johnson & McCollom PC
Ray Gopal C.
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