Control system and memory control method executing a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S764000, C714S768000

Reexamination Certificate

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07395489

ABSTRACT:
A memory control device includes a writing unit writing information to a memory module, a reading unit reading the information from the memory module, an error detecting unit executing a detection of an error in the formation in parallel with the reading operation by the reading unit, an error correcting unit correcting the error in the information containing the error detected, and a control unit controlling a transfer and a receipt of the information to and from an external device and stopping, when the error is detected, an output of the information to the external device.

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Stephen B. Wicker, “Error control Systems for Digital Communications and Storage”, Prentice-Hall, 1995, pp. 116-121.
Japanese Office Action dated Jul. 3, 2007 for corresponding Japanese Patent Application No. 2002-189770 (3 pages), English translation (3 pages).

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