Control of set/reset pulse in response to peripheral...

Details Control of set/reset pulse in response to peripheral... Control of set/reset pulse in response to peripheral...

2005-05-06

2008-01-01

Hur, J. H. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S211000, C365S194000

Reexamination Certificate

active

07315469

ABSTRACT:
A drive circuit for a PRAM (phase-change random access memory) device includes a write driver that generates a set/reset current in response to a set/reset pulse. In addition, a temperature compensator controls a pulse width of the set/reset pulse in response to a peripheral temperature of the PRAM device. For example, the temperature compensator maintains the pulse width to be substantially constant irrespective of the peripheral temperature. In another example, the temperature compensator decreases the width for higher peripheral temperature.

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