Control of hot carrier injection in a metal-oxide...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29112

Reexamination Certificate

active

10977732

ABSTRACT:
An MOS device is formed including a semiconductor layer of a first conductivity type, and first and second source/drain regions of a second conductivity type formed in the semiconductor layer proximate an upper surface of the semiconductor layer, the first and second source/drain regions being spaced apart relative to one another. A drift region is formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions. An insulating layer is formed on at least a portion of the upper surface of the semiconductor layer and above at least a portion of the drift region. A gate is formed on the insulating layer and at least partially between the first and second source/drain regions. The MOS device further includes a shielding structure formed on the insulating layer above at least a portion of the drift region. The shielding structure is configured such that an amount of hot carrier injection degradation in the MOS device is controlled as a function of an amount of coverage of the shielding structure over an upper surface of the drift region.

REFERENCES:
patent: 6614089 (2003-09-01), Nakamura et al.
patent: 2005/0191815 (2005-09-01), Shibib et al.
S. Manzini et al., “Hot-Electron-Induced Degradation in High-Voltage Submicron DMOS Transistors,” Proc. IEEE ISPSD, pp. 65-68, 1996.
D. Brisbin et al., “Hot Carrier Reliability of N-LDMOS Transistor Arrays for Power BiCMOS Applications,” Proc. IEEE IRPS, pp. 105-110, 2002.
P. Moens et al., “A Unified Hot Carrier Degradation Model for Integrated Lateral and Vertical nDMOS Transistors,” Proc. IEEE ISPSD, pp. 88-91, 2003.
S. Xu et al., “High Power Silicon RF LDMOSFET Technology for 2.1GHz Power Amplifier Applications,” Proc. IEEE ISPSD, pp. 190-193, 2003.
T. Nigam et al., “Nature and Location of Interface Traps in RF LDMOS due to Hot Carriers,” INFOS, Barcelona, Spain, 4 pages, 2003.

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