Control of air gap position in a dielectric layer

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S752000, C257S758000, C257S765000

Reexamination Certificate

active

07087998

ABSTRACT:
A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at least two features and a substrate and an air gap is formed between the at least two features and above the feature height. The first dielectric layer is etched between the at least two features to open the air gap. Then a second dielectric layer is deposited over the etched first dielectric layer to form an air gap between the at least two features and completely below the feature height.

REFERENCES:
patent: 6214719 (2001-04-01), Nag
patent: 6309946 (2001-10-01), Givens

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