Control method of non-volatile semiconductor memory cell and...

Details Control method of non-volatile semiconductor memory cell and... Control method of non-volatile semiconductor memory cell and...

2005-03-01

2005-03-01

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185190, C365S185220, C365S185290

Reexamination Certificate

active

06862217

ABSTRACT:
It is intended to provide control method and a nonvolatile semiconductor memory device capable of erase operation or write operation in high speed securing reliability without applying excessive electric field. An operation unit consists of a plurality of operation cycles each of which has a bias-application period and a verification period. Addition voltage ΔV is added to each operation unit as bias voltage, whereby a write operation can be carried out with characteristic of injected current IFG that is uniform among respective operation units duration of which are generally same. In this case, duration of operation cycles are shortened by each operation unit and duration of verification periods are shortened so as to avoid a situation such that a write operation completes in the middle of a bias-application period and after that, another write operation continues to cause excessive voltage stress on non-volatile semiconductor memory cells.

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