Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2006-05-02
2006-05-02
Corrielus, Jean B. (Department: 2637)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C710S052000
Reexamination Certificate
active
07039145
ABSTRACT:
In the field of optical communications, the need to remove jitter from a Synchronous Digital Hierarchy (SDH) or Synchronous Optical NETwork (SONET) datastream is recognized. Consequently, the present invention provides a First-In-First-Out (FIFO) buffer having a read-out clock frequency that is controlled in response to a depth error of the FIFO buffer. The control of the read-out clock frequency is achieved by a hardware control loop coupled to the FIFO buffer. The period of the control loop is a product of the frequency at which the depth error of the FIFO buffer is acquired and another factor. The another factor is the number of states of logic employed by the control loop raised to an integer power.
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Agilent Technologie,s Inc.
Corrielus Jean B.
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